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Sun, October 23, 2022
Recent quantum computing experiments based on Josephson qubits have demonstrated primordial versions of error detection. A demonstration of full fault requires simultaneous increases in device scale (10’s -> 100’s of qubits) and performance. In particular, the speed and accuracy of qubit readout must be improved through design of the superconducting chip, while the size of the off-chip microwave receiver (amplifiers, circulators) must be reduced. In this talk, we give an overview of these requirements. We show how theory predicts experimentally observed speed and accuracy of multiplexed qubit readout at the level of 1% errors, and we use this theory to provide guidelines for the design of a qubit readout system suitable for a demonstration of fault tolerance with ~1000 qubits. Focus is given to frequency crowding, amplifier saturation, impedance matching (between the chip, package, and receiver), and loss between the chip and receiver. We also comment on the thermal and space requirements of circulators and 4 Kelvin amplifiers that follow the quantum limited paramps.